Visit us, or email the PI directly.
We are looking for M.S. applicants and for undergraduate interns at Handong Global University. A background in analog or mixed-signal circuit design helps, as does being comfortable with Verilog / Verilog-A and Python - but curiosity about how a circuit actually behaves matters more than a finished skill set. Email shinwoong@handong.edu with a short note about what you would like to work on.